Field effect transistor using insulator-semiconductor transition material layer as channel material and method of manufacturing the same

ABSTRACT

Provided is a field effect transistor including an insulator-semiconductor transition material layer. The insulator-semiconductor transition material layer selectively provides a first state where charged holes are not introduced to a surface of the insulator-semiconductor transition material layer when a gate field is not applied and a second state where a large number of charged holes are introduced to the surface of the insulator-semiconductor transition material layer to form a conductive channel when a negative field is applied. A gate insulating layer is formed on the insulator-semiconductor transition material layer. A gate electrode is formed on the gate insulating layer to apply a negative field of a predetermined intensity to the insulator-semiconductor transition material layer. A source electrode and a drain electrode are disposed to face each other at both sides of the insulator-semiconductor transition material layer so that charge carriers can flow through the conductive channel while the insulator-semiconductor transition material layer is in the second state.

TECHNICAL FIELD

The present invention relates to a field effect transistor and method ofthe same, and more particularly, to a field effect transistor using aninsulator-semiconductor transition material layer as a channel material,and manufacture method of the same.

BACKGROUND ART

Among transistors, metal oxide semiconductor field effect transistors(MOSFETs) have currently become the leading choice of designers asultra-small size and high speed switching transistors. MOSFETs employ adouble pn-junction structure as a base structure, the pn-junctionstructure having a linear property at a low drain voltage. As the degreeof integration of devices increases, the total channel length needs tobe reduced. However, a reduction in a channel length causes variousproblems due to a short channel effect. For example, when a channellength is reduced to approximately 50 nm or less, the size of adepletion layer increases, thereby the density of charge carrierschanges and current flowing between a gate and a channel increases.

To solve these problems, a study has been made on field effecttransistors using a Mott-Hubbard insulator as a channel material, theMott-Hubbard insulator undergoing a Hubbard's continuous metal-insulatortransition, that is, a second-order phase transition. A Hubbard'scontinuous metal-insulator transition was explained by J. Hubbard, in“Proc. Roy. Sci. (London) A276, 238 (1963), A281, 40-1 (1963),” and atransistor using the Hubbard's continuous metal-insulator transition wasdisclosed by D. M. Newns, J. A. Misewich, C. C. Tsuei, A, Gupta, B. A.Scott, and A. Schrott, in “Appl. Phys. Left. 73, 780 (1998).”Transistors using a Hubbard's continuous metal-insulator transition arecalled Mott-Hubbard field effect transistors or Mott field effecttransistors. Mott-Hubbard field effect transistors perform on/offoperation according to a metal-insulator transition. In contrast toMOSFETs, Mott-Hubbard field effect transistors do not include anydepletion layer, and accordingly, can drastically improve the degree ofintegration thereof. In addition, Mott-Hubbard field effect transistorsare said to provide a higher speed switching function than MOSFETs.

On the other hand, Mott-Hubbard field effect transistors use aMott-Hubbard insulator as a channel material. The insulator has ametallic structure which is one electron per atom The non-uniformityresults in large leakage current, and accordingly, the transistorscannot achieve high current amplification at a low gate voltage and alow source-drain voltage. For example, a Mott-Hubbard insulator, such asY_(1-x)Pr_(x)Ba₂Cu₃O_(7-d) (YPBCO), includes an element Cu with highconductivity.

DISCLOSURE OF THE INVENTION

The present invention provides a field effect transistor using aninsulator-semiconductor transition material layer as a channel materialto achieve high current amplification at a low gate voltage and a lowsource-drain voltage.

The present invention also provides a method of manufacturing the fieldeffect transistor.

In accordance with an aspect of the present invention, there is provideda field effect transistor comprising: an insulator-semiconductortransition material layer which selectively provides a first state inwhich charged holes are not introduced to a surface of theinsulator-semiconductor transition material layer when a gate field isnot applied and a second state in which a large number of charged holesare introduced to the surface of the insulator-semiconductor transitionmaterial layer when a negative field is applied to form a conductivechannel; a gate insulating layer formed on the insulator-semiconductortransition material layer; a gate electrode formed on the gateinsulating layer for applying a negative field of a predeterminedintensity to the insulator-semiconductor transition material layer; anda source electrode and a drain electrode facing each other at both sidesof the insulator-semiconductor transition material layer to move chargecarriers through the conductive channel while theinsulator-semiconductor material layer is in the second state.

The insulator-semiconductor transition material layer may be disposed ona silicon substrate, a silicon-on-insulator substrate, or a sapphiresubstrate.

The insulator-semiconductor transition material layer may be disposed ona silicon substrate, a silicon-on-insulator substrate, or a sapphiresubstrate.

The insulator-semiconductor transition material layer may be a vanadiumdioxide (VO₂), V₂O₃, V₂O₅ thin films.

The insulator-semiconductor transition material layer may be analkali-tetracyanoquinodimethane (TCNQ) thin film which is selected fromthe group consisting of Na-TCNQ, K-TCNQ, Rb-TCNQ, and Cs-TCNQ.

The gate insulating layer may be a dielectric layer selected from thegroup consisting of Ba_(0.5)Sr_(0.5)TiO₃, Pb_(1-x)Zr_(x)TiO₃ (0≦x≦0.5),Ta₂O₃, Si₃N₄, and SiO₂.

The source electrode, the drain electrode, and the gate electrode may begold/chromium (Au/Cr) electrodes.

In accordance with another aspect of the present invention, there isprovided a method of manufacturing a field effect transistor,comprising: forming an insulator-semiconductor transition material layeron a substrate to selectively provide a first state in which chargedholes are not introduced to a surface of the insulator-semiconductortransition material layer when a field is not applied and a second statein which a large number of charged holes are introduced to the surfaceof the insulator-semiconductor transition material layer when a negativefield is applied to form a conductive channel; forming a sourceelectrode and a drain electrode to cover some portions at both sides ofthe insulator-semiconductor transition material layer; forming aninsulating layer on the substrate, the source electrode, the drainelectrode, and the insulator-semiconductor transition material layer;and forming a gate electrode on the insulating layer.

The substrate may be a single crystal silicon substrate, asilicon-on-insulator substrate, or a sapphire substrate.

The insulator-semiconductor transition material layer may be a vanadiumdioxide thin film.

The insulator-semiconductor transition material layer may be analkali-tetracyanoquinodimethane thin film.

The method may further comprise patterning the insulator-semiconductortransition material layer to have an area from several tens of nm² toseveral μm².

The patterning may be performed using a photolithography process and aradio frequency (RF)-ion milling process.

The source electrode, the drain electrode, and the gate electrode may beformed using a lift-off process.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a graph illustrating changes with temperature in a resistanceof a channel material of a field effect transistor according to thepresent invention;

FIG. 2 is a graph illustrating Hall effect measurement results of thefield effect transistor according to the present invention. Minus (−)means that carriers are holes;

FIG. 3 is a diagram illustrating a layout of a field effect transistoraccording to the present invention;

FIG. 4 is a cross-sectional view taken along the line II-II′ of thefield effect transistor shown in FIG. 3;

FIG. 5 is an enlarged view of a portion “A” of the field effecttransistor shown in FIG. 3; and

FIG. 6 is a graph illustrating operational characteristics of the fieldeffect transistor shown in FIG. 3.

110: Al₂O₃ substrate, 120: VO₂ film, 130: Source Au/Cr electrode, 140:Drain Au/Cr electrode, 160: Gate Au/Cr electrode, 150: dielectricgate-insulator layer

BEST MODE FOR CARRYING OUT THE INVENTION

FIG. 1 is a graph illustrating changes with temperature in a resistanceof a channel material of a field effect transistor according to thepresent invention.

Referring to FIG. 1, a representative example of aninsulator-semiconductor transition material layer used as a channelmaterial of a field effect transistor is a vanadium dioxide (VO₂) thinfilm. For example, a VO₂ thin film is a Mott-Brinkman-Rice insulator.Thus, resistance of the VO₂ thin film decreases logarithmically untiltemperature increases to approximately 330K. However, when thetemperature reaches approximately 340K, a resistance of the VO₂ thinfilm sharply decreases, thereby causing a phase transition to metal.Although such a transition does not occur naturally at a normaltemperature, the phase transition can occur at a normal temperatureunder specific conditions, that is, when predetermined potentials areapplied to a surface of the VO₂ thin film and charged holes are injectedinto the VO₂ thin film. To use this physical insulator-metal transitionphenomenon, the charged holes should be injected into the VO₂ thin filmin a state where a relatively high voltage is applied between a drainand a source. The field effect transistor according to the presentinvention does not use the insulator-metal transition phenomenon.According to the field effect transistor of the present invention, eventhough a relatively low voltage is applied between the source and thedrain, a negative field is formed on the surface of the VO₂ thin film tocause current to flow between the drain and the source.

FIG. 2 is a graph illustrating Hall effect measurement results of theVO₂ thin film for the field effect transistor according to the presentinvention. In FIG. 2, a symbol “−” represents a hole.

As shown in FIG. 2, Hall effect measurement results show that electronsof about 10.7×10¹⁵/cm³ are present within the VO₂ thin film at atemperature of about 332K, and the amount of electrons sharply increasesas temperature increases. As previously explained, this is a theoreticalbase for explaining the insulator-metal transition of the VO₂ thin film.In the meantime, holes of about 1.16×10¹⁷/cm³ are present at atemperature of about 332K and holes of about 7.37×10¹⁵/cm³ are presentat a temperature of about 330K. As the temperature decreases, the numberof holes decreases gradually. Finally, holes of about 1.25×10¹⁵/cm³ arepresent at a temperature of about 324K. Differently from electrons, thenumber of holes induced by a gate field increases as the number of holesmeasured by Hall effect decreases due to charge conservation. That is,as temperature decreases, a larger number of holes are confined in apredetermined quantum well.

Accordingly, a good conductive state can be attained through inductionof the large number of holes confined in the quantum well even uponapplication of a very low field. An insulator-semiconductor transitionmaterial has these characteristics. That is, the insulator-semiconductortransition material has such characteristics that it can maintain aninsulation state when a field is not formed, whereas it can make aconductive channel using induced holes when a negative field is formed.Examples of the insulator-semiconductor transition material include analkali-tetracyanoquinodimethan (TCNQ) material, besides the VO2 thinfilm. The alkali-TCNQ material may be selected from the group consistingof Na-TCNQ, K-TCNQ, Rb-TCNQ, and Cs-TCNQ.

FIG. 3 is diagram illustrating a layout of a field effect transistorusing an insulator-semiconductor transition material layer as a channelmaterial. FIG. 4 is a cross-sectional view taken along the line II-II′of the field effect transistor shown in FIG. 3. FIG. 5 is an enlargedplan view of a portion “A” of the field effect transistor shown in FIG.3.

Referring to FIGS. 3 through 5, a VO₂ thin film 120 having a thicknessof about 700-1000 Å and having a pattern with an area of several μm² isdisposed on a single crystal sapphire (Al₂O₃) substrate 110. The VO₂thin film 120 is an insulator-semiconductor transition material layer.Other insulator-semiconductor transition material layers can be used,instead of the VO₂ thin film 120. While the present embodiment employsthe single crystal sapphire substrate 110 which provides suitabledeposition conditions for growth of the VO₂ thin film 120, the presentinvention is not limited thereto. For example, a single crystal silicon(Si) substrate, or a silicon-on-insulator (SOI) substrate can be used,if necessary.

A first gold/chromium (Au/Cr) electrode 130 and a second Au/Cr electrode140 are respectively formed as a source electrode and a drain electrodeon some portions of the single crystal sapphire substrate 110 and theVO₂ thin film 120. The first Au/Cr electrode 130 is adhered to someportions at a left side of the VO₂ thin film 120. The second Au/Crelectrode 140 is adhered to some portions of a right side of the VO₂thin film 120. The first Au/Cr electrode 130 and the second Au/Crelectrode 140 are spaced from each other by a channel length L anddisposed on the VO₂ thin film 120 to face each other. As shown in FIG.5, a distance between the first Au/Cr electrode 130 and the second Au/Crelectrode 140, that is, the length L of a channel, is approximately 3μm, and a width W of the channel is approximately 50 μm. While the Au/Crmetal thin films are used as the source electrode and the drainelectrode in the present embodiment, a Cr film in the Au/Cr double metalthin film functions as a buffer layer for good adhesion between thesingle crystal sapphire substrate 110 and an Au film, has a thickness ofabout 50 nm.

A gate insulating layer 150 is formed on the first and second Au/Crelectrodes 130 and 140 and the square VO₂ thin film 120 and on someportions of the sapphire substrate 110, leaving two electrode pads asshown in FIG. 3. While a Ba_(0.5)Sr_(0.5)TiO₃ (BSTO) dielectric layerhaving a dielectric constant of about 43 can be used as the gateinsulating layer 150, the gate insulating layer 150 is not limited tothe BSTO dielectric layer. Other dielectric layers than the BSTOdielectric layer, for example, Pb_(1-x)Zr_(x)TiO₃ (0≦x≦0.5) and Ta₂O₃having a high dielectric constant, or Si₃N₄ and SiO₂ having generalinsulation property can be used as the gate insulating layer 150. Athird Au/Cr electrode 160 is formed as a gate electrode on the gateinsulating layer 150.

Operation and operational characteristics of the field effect transistorusing the VO₂ thin film as a channel material will be explained withreference to a graph in FIG. 6.

As shown in FIG. 6, current is considerably different between a case 610where a bias is not applied to the gate electrode 160 and cases 620 and630 where a negative bias is applied to the gate electrode 160, at a lowdrain-source voltage. For example, in a state where a drain-sourcevoltage is approximately 0.3V, when a bias is not applied to the gateelectrode 160, current flowing between the source and the drain is sosmall that it can be ignored. This is because holes within the VO₂ thinfilm used as a channel material cannot exit from the quantum well.However, in a state where the drain-source voltage is approximately0.3V, when a negative bias of −2V (620) or −10V (630) is applied to thegate electrode 160, current flowing between the source and the drain is250 times larger than that when the bias is not applied to the gateelectrode 160 (610). This is because when the negative bias of −2V or−10V is applied to the surface of the VO₂ thin film to induce holeswithin the quantum well to the surface of the VO₂ thin film, aconductive path is formed between the source and the drain.

A method of manufacturing the field effect transistor according to thepresent invention will be explained with reference to FIGS. 3 and 4.

First, the VO₂ thin film 120 is formed on the single crystal sapphiresubstrate 110 to have a thickness of about 700-1000 Å. A photoresistlayer (not shown) is coated on the VO₂ thin film 120 using aspin-coater, and the VO₂ thin film 120 is patterned through aphotolithography process using a Cr-mask and an etching process. A radiofrequency (RF)-ion milling process can be used as the etching process.The VO₂ thin film 120 is patterned to have a square area of several μm².

Next, an Au/Cr layer is formed on the surface of the single crystalsapphire substrate 110, from which some portions of the VO₂ thin filmare removed, and the square VO₂ thin film 120 to have a thickness ofabout 200 nm. The first Au/Cr electrode 130 and the second Au/Crelectrode 140 are formed to cover some portions at right and left sidesof the VO₂ thin film 120 through a general lift-off process. When someportions of the Au/Cr layer are removed through the lift-off process,care should be taken so as for a channel to have a length of 3 μm and awidth of 50 μm. The channel length and width can vary, if necessary.

Next, the gate insulating layer 150 is formed on the exposed surfaces ofthe single crystal sapphire substrate 110, the first Au/Cr electrode130, the second Au/Cr electrode 140, and the VO₂ thin film 120. Next,the gate insulating layer 150 is patterned to prominently show pads ofthe first electrode 130 and the second electrode 140. The third Au/Crelectrode 160 is formed as a gate electrode on the gate insulating layer150. The third Au/Cr electrode 160 is formed in the same manner as thefirst and second Au/Cr electrodes 130 and 140.

As described above, a field effect transistor according to the presentinvention uses an insulator-semiconductor transition material thin filmas a channel material, in contrast to the conventional art which employsa pn-junction semiconductor structure. Therefore, the field effecttransistor of the present invention has an advantage in that it does notsuffer problems caused due to a short channel effect, and accordingly,can improve the degree of integration thereof and a switching speed. Thefield effect transistor has another advantage in that it can provide aninsulation state or a conductive state according to whether a negativevoltage is applied to a gate electrode in a state where a relatively lowbias is applied between a drain and a source. In particular, currentflowing in the conductive state can be about 250 times more than thatflowing in the insulation state.

While the present invention has been particularly shown and describedwith reference to exemplary embodiments thereof, it will be understoodby those of ordinary skill in the art that various changes in form anddetails may be made therein without departing from the spirit and scopeof the present invention as defined by the following claims.

1. A field effect transistor comprising: an insulator-semiconductortransition material layer which selectively provides a first state inwhich charged holes are not introduced to a surface of theinsulator-semiconductor transition material layer when a gate field isnot applied and a second state in which a large number of charged holesare introduced to the surface of the insulator-semiconductor transitionmaterial layer when a negative field is applied to form a conductivechannel; a gate insulating layer formed on the insulator-semiconductortransition material layer; a gate electrode formed on the gateinsulating layer for applying a negative field of a predeterminedintensity to the insulator-semiconductor transition material layer; anda source electrode and a drain electrode facing each other at both sidesof the insulator-semiconductor transition material layer to move chargecarriers through the conductive channel while theinsulator-semiconductor material layer is in the second state.
 2. Thefield effect transistor of claim 1, wherein the insulator-semiconductortransition material layer is disposed on a silicon substrate, asilicon-on-insulator substrate, or a sapphire substrate.
 3. The fieldeffect transistor of claim 1, wherein the insulator-semiconductortransition material layer is a vanadium dioxide (VO₂), V₂O₃, V₂O₅ thinfilms.
 4. The field effect transistor of claim 1, wherein theinsulator-semiconductor transition material layer is analkali-tetracyanoquinodimethane thin film which is selected from thegroup consisting of Na-TCNQ, K-TCNQ, Rb-TCNQ, and Cs-TCNQ.
 5. The fieldeffect transistor of claim 1, wherein the gate insulating layer is adielectric layer selected from the group consisting ofBa_(0.5)Sr_(0.5)TiO₃, Pb_(1-x)Zr_(x)TiO₃ (0≦x≦0.5), Ta₂O₃, Si₃N₄, andSiO₂.
 6. The field effect transistor of claim 1, wherein the sourceelectrode, the drain electrode, and the gate electrode are gold/chromiumelectrodes.
 7. A method of manufactunng a field effect transistor,comprising: forming an insulator-semiconductor transition material layeron a substrate to selectively provide a first state in which holes arenot introduced to a surface of the insulator-semiconductor transitionmaterial layer when a field is not applied and a second state in which alarge number of holes are introduced to the surface of theinsulator-semiconductor transition material layer when a negative fieldis applied to form a conductive channel; forming a source electrode anda drain electrode to cover some portions at both sides of theinsulator-semiconductor transition material layer; forming an insulatinglayer on the substrate, the source electrode, the drain electrode, andthe insulator-semiconductor transition material layer; and forming agate electrode on the insulating layer.
 8. The method of claim 7,wherein the insulator-semiconductor transition material layer is avanadium dioxide thin film.
 9. The method of claim 7, wherein theinsulator-semiconductor transition material layer is analkali-tetracyanoquinodimethane thin film which is selected from thegroup consisting of Na-TCNQ, K-TCNQ, Rb-TCNQ, and Cs-TCNQ.
 10. Themethod of claim 7, further comprising patterning theinsulator-semiconductor transition material layer to have an area fromseveral tens of nm² to several μm².
 11. The method of claim 10, whereinthe patterning is performed using a photolithography process and a radiofrequency-ion milling process.
 12. The method of claim 7, wherein thesource electrode, the drain electrode, and the gate electrode are formedusing a lift-off process.